As a consequence of the different thermal expansion behavior of the materials involved, thermomechanical stresses occur at the contact points of the semiconductor devices, namely predominantly in corner areas, which result in contact points metalized over their full area breaking.
Conventionally, interrupted contacts or contact points broken on semiconductor devices should be prevented by adapting the thermal coefficients of expansion of the materials in question. This solution is complex. Materials with adapted coefficients of expansion are not available.
Patent specification US 2004/101663 A1 discloses a stacked through-pin with improved reliability in copper metallurgy. An integrated multi-layer semiconductor circuit structure has a first connection layer which has a layer made from dielectric material over a semiconductor substrate, whereby the layer made from dielectric material has a dense material for the passivation of semiconductor devices and local connections beneath. In addition, a silicon substrate is disclosed, on which a connection layer is provided which is embedded in a passivation layer. A high-power connection is produced by means of highly conducting wiring on different levels which are insulated from one another with layers of low k dielectric constant and connected at desired points by metal-filled through-pins.
Patent specification WO 03/030247 A2 discloses a method for contacting electrical contact surfaces on a surface of a substrate, whereby a foil is laminated under vacuum onto the surface on a polyimide or epoxide base in such a way that the foil tightly covers the surface with the contact surfaces and adheres on this surface. Each contact surface to be contacted on the surface is exposed by opening respective windows in the foil. Planar contact is established with each exposed contact surface by means of a layer of metal.
Patent specification WO 02/101830 A2 discloses electronic components having a plurality of microelectronic spring contacts.
U.S. Pat. No. 5,086,337 discloses a connection structure and also an electronic device using this structure. A contacting structure for establishing electrical contact with an electronic component, such as a chip on a substrate for example, the manufacturing method and an electronic device using the structure are described.
Patent specification US 2003/0057 515 A1 discloses a manufacturing method for electronic interface structures. Such a structure has a substrate whereby one area with elastomers is carried through the substrate. A structured metallization covers the elastomer area. The metallization has at least one fluid small area which at least partially covers the elastomer area.